PATCA - Thomas L. Iddings



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Thomas L. Iddings - Senior Member
ECL ADVANTAGE, INC.
1022 E. Evelyn Ave., Suite 2P
Sunnyvale , CA 94086

Phone:408-247-3254
tiddings@ieee.org

Very High Speed Digital Circuit Design & Signal Integrity

Electronic Clock and Data Distribution System design at Multi-GHz speeds. Plus, Signal Integrity and SPICE Modelling. 25+ years of Electronic Engineering, mostly in ATE (Automated Test Equipment), plus Datacom, Networks, E-BEAM Control, Biotech, Test & Measurement. *** Design Rules taught. PCB Layouts directed and reviewed. IC DUT Load Boards Created. Prototypes designed, built, and tested.

* PCB & ASIC designs in CMOS, ECL, GaAs

* Clock Generation & distribution, PLL > 3 GHz

* SPICE Simulations of Backplanes, PCBs & Devices

* Teach customized high speed design rules for teams

* PCB Fab Specs, routing rules, design reviews

* Prototypes designed, built, and tested

* Signal Integrity & Power Integrity Reviews

* Complience Testing of High Speed Serial Paths

Very Fast architectures, data transfers, DACs & ADCs.Very low jitter systems design & test.

BSEE